This invention relates generally to transceiver architecture in a wireless portable communication device. More particularly, the invention relates to systems and methods for performing a gain calibration in open loop and closed loop data paths in a multiple mode transceiver.
Radio frequency (RF) transmitters are found in many one-way and two-way communication devices, such as portable communication devices, (cellular telephones), personal digital assistants (PDAs) and other communication devices. An RF transmitter must transmit using whatever communication methodology is dictated by the particular communication system within which it is operating. For example, communication methodologies typically include amplitude modulation, frequency modulation, phase modulation, or a combination of these. In a typical global system for mobile communications (GSM) mobile communication system using narrowband time-division multiple access (TDMA), a Gaussian minimum shift keying (GMSK) modulation scheme is used to communicate data.
The deployment of new wireless systems presents unique challenges to mobile handset designers. In order to reap the full benefit of expanded capacity and increased data bandwidth, the new handsets must work on both the new systems as well as the old. One of these new systems is referred to as Enhanced Data Rates for GSM Evolution (EDGE). The EDGE standard is an extension of the Global System for Mobile Communications (GSM) standard.
The EDGE standard increases the data rate over that available with GSM by sending more bits per RF burst. More bits are sent in EDGE by using a modulation scheme based on 8-phase shift keying (8-PSK), which provides an increase over GSM's Gaussian minimum shift keying (GMSK) modulation format. In the EDGE modulation scheme, the 8-PSK constellation is rotated 3 radians every symbol period to avoid problems associated with zero crossings. In contrast to GMSK's constant amplitude envelope, the added rotation factor in the EDGE modulation scheme results in a non-constant amplitude envelope. This non-constant amplitude envelope presents some difficulties with regard to RF power control. These problems are exacerbated by the desire to have a single transmitter that can be used for both the GSM and EDGE standards.
The two point modulation scheme used to support both GMSK and EDGE sets stringent requirements on gain alignment (voltage-controlled oscillator (VCO) gain or Kvco) between open loop and closed loop data paths in the transmitter. Simulations indicate that in order to meet the spectral mask specifications for both standards, Kvco should be known to an accuracy of less than 2%.
In order to account for the effects of channel frequency variation and temperature drift, Kvco must be measured or otherwise determined before the start of each transmit burst. Approximately 150 microseconds is available to measure and adjust perform any required digital frequency centering, and to settle the phase-locked loop. Thus, less than 150 microseconds is available before the start of each data burst to measure and adjust Kvco.
One approach to measure Kvco includes using the sigma-delta modulator to adjust the divider in the feedback path and measuring the corresponding change in the analog voltage applied at the input to the VCO using an analog-to-digital converter (ADC). This approach fails to account for gain in the digital-to-analog converter (DAC), which supplies high-pass data to the VCO. Consequently, this first approach ignores the gain introduced in the high-pass data path and does not provide an accurate estimate of Kvco.
A second approach applies a step voltage to the VCO through the DAC and measures the change in frequency at the output of the VCO. Conventional VCOs include a single varactor with two modulation ports. An array of switchable capacitors under digital control is adjusted to bring the VCO close to its final frequency value. Thereafter, the PLL takes over and locks the loop such that the output frequency of the PLL stabilizes. As a result, an accurate measurement of Kvco using this second method is dependent on the combination of the correct digital control signal and the input voltage to the VCO. In order to receive an accurate value for the input voltage to the VCO, the PLL must be allowed to settle. Accordingly, to apply a step voltage to the VCO through the DAC and accurately determine Kvco, the loop must be locked at both the initial DAC value and the final DAC value. Thereafter, the change in frequency is divided by the difference of the digital input signals to the DAC to calculate Kvco. However, to achieve Kvco accuracy of less than 2%, a period of time in excess of that permitted before a data transmission burst in GMSK and EDGE communication standards is required.
Therefore, it would be desirable to economically, efficiently and accurately measure Kvco to less than 2% accuracy in the limited time available before the start of a data burst.